XC9572XL-10VQG64I

CPLD, QFP, 3.3V, Xilinx, low voltage, 5ns, –0.5V to 4.0V, Low power operation, 178MHz

Rated 5 Rating 5 | reviews | Write a review

Price:: US $1.30~1.50 / piece [Get Latest Price]

Reference price:

Qty (lots)	Price/lot
	US $1.30~1.50

PartNumber:: XC9572XL-10VQG64I

Brand:: Xilinx, Inc - Xilinx | Pack: QFP | D/C: 11+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

Quantity:: piece

Total Price:: US $0

Place Order via Escrow Service

Sold By

Ms. Tesi's store

(China (Mainland))

add to my favourite

100% Positive feedback

Detailed seller ratings

Visit Store

Contact Now

Esrcow Service

Place orders confidently and securely via it

Safe payments
Quick and easy transactions
Free service charges

Learn More >>

Previous Next

Products Upload time: 2011-08-02

From Other Seller

Part Number:XC9572XL-10VQG64I
US $1.30 - 1.50
ECA1HHG220

US $2.00 - 10.00 / Piece
(0) Remove
A50L-0001-0175

US $100.00 - 100.00 / Piece
(0) Remove
Quantity:

piece

Product Summary

The XC9572XL-10VQG64I is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of four 54V18 Function Blocks, providing 1,600 usable gates with propagation delays of 5 ns.

Parametrics

XC9572XL-10VQG64I absolute maximum ratings: (1)Supply voltage relative to GND:–0.5V to 4.0V; (2)Input voltage relative to GND:–0.5V to 5.5V; (3)Voltage applied to 3-state output:–0.5V to 5.5V; (4)Storage temperature (ambient):–65℃ to +150℃; (5)Junction temperature:+150℃.

Features

XC9572XL-10VQG64I features: (1)5 ns pin-to-pin logic delays; (2)System frequency up to 178 MHz; (3)72 macrocells with 1,600 usable gates; (4)Available in small footprint packages:44-pin PLCC (34 user I/O pins),44-pin VQFP (34 user I/O pins),48-pin CSP (38 user I/O pins),64-pin VQFP (52 user I/O pins),100-pin TQFP (72 user I/O pins),Pb-free available for all packages; (5)Optimized for high-performance 3.3V systems:Low power operation, 5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals,3.3V or 2.5V output capability, Advanced 0.35 micron feature size CMOS Fast FLASH technology; (6)In-system programmable; (7)Superior pin-locking and routability with Fast CONNECT II switch matrix; (8)Extra wide 54-input Function Blocks; (9)Up to 90 product-terms per macrocell with individual product-term allocation; (10)Local clock inversion with three global and one product-term clocks; (11)Individual output enable per output pin; (12)Input hysteresis on all user and boundary-scan pin inputs; (13)Bus-hold circuitry on all user pin inputs; (14)Full IEEE Standard 1149.1 boundary-scan (JTAG) ; (15)Fast concurrent programming; (16)Slew rate control on individual outputs; (17)Enhanced data security features; (18)Excellent quality and reliability.